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Abstract

With the rise of the transistor in the 1970s, electronics shifted from analog circuitry, where values are stored on a continuum, to digital, in which ones and zeros are the law of the land. Transistors, as a class circuit element, can be affected by radiation and cosmic rays which then cause temporary or permanent failures, depending on the specifics of the situation. On Earth, this poses little risk with all electronics shielded by the magnetosphere, however for space bound electronics, the risks from these extraterrestrial particles are not so negligible. The first step in designing a mission to be able to survive upsets from energetic particles is to understand how these particles affect all the devices of a space-bound circuit. While this characterization historically assumes constant behavior across one chip, in this senior honors thesis I present an electrical characterization of cell level variations in upset probability by low-energy protons for a specific class of digital chip: SRAM. This characterization is possible because of random process variation in the manufacturing of the underlying transistors that is then responsible for variation in the critical charge to upset for each cell of an SRAM. The results of the electrical characterization are then related to upset data acquired by irradiating chips at the Vanderbilt University Pelletron. These data are used in conjunction with the cell level electrical characterization to discuss the effects of virtually screening out cells with higher probability to upset.

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